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this is information on a product in full production. october 2013 docid023448 rev 5 1/21 STD7N80K5, stp7n80k5, stu7n80k5 n-channel 800 v, 0.95 typ., 6 a zener-protected supermesh? 5 power mosfets in dpak, to-220 and ipak packages datasheet - production data figure 1. internal schematic diagram features ? worldwide best fom (figure of merit) ? ultra low gate charge ? 100% avalanche tested ? zener-protected applications ? switching applications description these n-channel zener-protected power mosfets are designed using st?s revolutionary avalanche-rugged very high voltage supermesh? 5 technology, based on an innovative proprietary vertical structure. the result is a dramatic reduction in on-resistance, and ultra-low gate charge for applications which require superior power density and high efficiency. to-220 1 2 3 tab dpak 1 3 tab 2 3 2 1 tab ipak d(2, tab) g(1) s(3) am01476v1 order codes v ds r ds(on) max i d p tot STD7N80K5 800 v 1.2 6 a 110 w stp7n80k5 stu7n80k5 table 1. device summary order codes marking package packaging STD7N80K5 7n80k5 dpak tape and reel stp7n80k5 to-220 tube stu7n80k5 ipak www.st.com
contents STD7N80K5, stp7n80k5, stu7n80k5 2/21 docid023448 rev 5 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 docid023448 rev 5 3/21 STD7N80K5, stp7n80k5, stu7n80k5 electrical ratings 21 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit v gs gate- source voltage 30 v i d drain current (continuous) at t c = 25 c 6 a i d drain current (continuous) at t c = 100 c 3.8 a i dm (1) 1. pulse width limited by safe operating area. drain current (pulsed) 24 a p tot total dissipation at t c = 25 c 110 w i ar max current during repetitive or single pulse avalanche (pulse width limited by t jmax ) 2a e as single pulse avalanche energy (starting t j = 25 c, i d =i as , v dd = 50 v) 88 mj dv/dt (2) 2. i sd 6 a, di/dt 100 a/s, v ds(peak) v (br)dss peak diode recovery voltage slope 4.5 v/ns t j operating junction temperature -55 to 150 c t stg storage temperature c table 3. thermal data symbol parameter value unit dpak to-220 ipak r thj-case thermal resistance junction-case max 1.14 c/w r thj-amb thermal resistance junction-amb max 62.5 100 c/w r thj-pcb (1) 1. when mounted on 1 inch2 fr-4, 2 oz copper board. thermal resistance junction-pcb max 50 c/w electrical characteristics STD7N80K5, stp7n80k5, stu7n80k5 4/21 docid023448 rev 5 2 electrical characteristics (t case = 25 c unless otherwise specified). table 4. on/off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage (v gs = 0) i d = 1 ma 800 v i dss zero gate voltage drain current (v gs = 0) v ds = 800 v v ds = 800 v, tc=125 c 1 50 a a i gss gate body leakage current (v ds = 0) v gs = 20 v 10 a v gs(th) gate threshold voltage v ds = v gs , i d = 100 a 3 4 5 v r ds(on) static drain-source on- resistance v gs = 10 v, i d = 3 a 0.95 1.2 table 5. dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds =100 v, f=1 mhz, v gs =0 -360- pf c oss output capacitance - 30 - pf c rss reverse transfer capacitance -1-pf c o(tr) (1) 1. time related is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss equivalent capacitance time related v gs = 0, v ds = 0 to 640 v -47-pf c o(er) (2) 2. energy related is defined as a constant equival ent capacitance giving the same stored energy as c oss when v ds increases from 0 to 80% v dss equivalent capacitance energy related -20-pf r g intrinsic gate resistance f = 1 mhz, i d =0 - 6 - q g total gate charge v dd = 640 v, i d = 6 a v gs =10 v (see figure 17 ) - 13.4 - nc q gs gate-source charge - 3.7 - nc q gd gate-drain charge - 7.5 - nc docid023448 rev 5 5/21 STD7N80K5, stp7n80k5, stu7n80k5 electrical characteristics 21 the built-in back-to-back zener diodes have been specifically designed to enhance not only the device's esd capability, but also to make them capable of safely absorbing any voltage transients that may occasionally be applied from gate to source. in this respect, the zener voltage is appropriate to achieve efficient and cost-effective protection of device integrity. the integrated zener diodes thus eliminate the need for external components. table 6. switching times symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 400 v, i d = 3 a, r g =4.7 , v gs =10 v (see figure 19 ) -11.3- ns t r rise time 8.3 ns t d(off) turn-off delay time 23.7 ns t f fall time 20.2 ns table 7. source drain diode symbol parameter test conditions min. typ. max. unit i sd source-drain current - 6 a i sdm source-drain current (pulsed) - 24 a v sd (1) 1. pulsed: pulse duration = 300s, duty cycle 1.5% forward on voltage i sd = 6 a, v gs =0 - 1.5 v t rr reverse recovery time i sd = 6 a, v dd = 60 v di/dt = 100 a/s, (see figure 18 ) - 315 ns q rr reverse recovery charge - 2.8 c i rrm reverse recovery current - 17.5 a t rr reverse recovery time i sd = 6 a,v dd = 60 v di/dt=100 a/s, tj=150 c (see figure 18 ) - 480 ns q rr reverse recovery charge - 3.8 c i rrm reverse recovery current - 16 a table 8. gate-source zener diode symbol parameter test conditions min typ. max unit v (br)gso gate-source breakdown voltage i gs = 1ma, i d =0 30 - - v electrical characteristics STD7N80K5, stp7n80k5, stu7n80k5 6/21 docid023448 rev 5 2.1 electrical characteristics (curves) figure 2. safe operating area for dpak and ipak figure 3. thermal impedance for dpak and ipak ) $ 6 $ 3 6 ! / p e r a t i o n i n t h i s a r e a i s , i m i t e d b y m a x 2 $ 3 o n ? s m s 4 j ? # 4 c ? # 3 i n l g e p u l s e ? s m s ! - v figure 4. safe operating area for to-220 figure 5. thermal impedance for to-220 figure 6. output characteristics figure 7. transfer characteristics ) $ 6 $ 3 6 ! / p e r a t i o n i n t h i s a r e a i s , i m i t e d b y m a x 2 $ 3 o n ? s m s 4 j ? # 4 c ? # 3 i n l g e p u l s e ? s m s ! - v ) $ 6 $ 3 6 ! 6 6 6 6 6 ' 3 6 ! - v ) $ 6 ' 3 6 ! 6 $ 3 6 ! - v docid023448 rev 5 7/21 STD7N80K5, stp7n80k5, stu7n80k5 electrical characteristics 21 figure 8. gate charge vs gate-source voltage figure 9. static drain-source on-resistance figure 10. capacitance variations figure 11. source-drain diode forward characteristics figure 12. normalized gate threshold voltage vs temperature figure 13. normalized on-resistance vs temperature 6 ' 3 1 g n # 6 6 $ 3 6 $ 3 6 ! - v 2 $ 3 o n ) $ ! / h m 6 ' 3 6 ! - v # 6 $ 3 6 p & |